current position

• simulator architect and senior engineer at the intel architecture group, intel corp.

previously

• software engineer at microsoft research and xbox, microsoft corp. (2005-2009)
• research intern at sun labs (2002) and intel research (2004)
• phd in computer science (2000-2004) on specification-driven dynamic binary translation (eprint)

publications

• "a proposal for hardware-assisted arithmetic overflow detection for array and bitfield operations" at the cgo 2010
• "dynamic binary translation for system emulation" at the dagstuhl seminar on emerging uses and paradigms for dynamic binary translation 2008
• "analysis of virtual method invocation for binary translation" at the wcre 2002
• "fast dynamic binary translation: the yirr-ma framework" at the wbt 2002
• "Specification of the HRTL Abstract Machine" Technical Report FIT-TR-2001-03 at the Queensland University of Technology 2001

patent applications

• signed/unsigned integer guest compare instructions using unsigned host compare instructions for precise architecture emulation (2007)

professional profile

• www.linkedin.com/in/jenstroeger